Integrated DC-DC Converters for Adaptive Ultra-Low-Energy Processors

Aalto University, P.O. Box 11000, FI-00076 Aalto www.aalto.fi Author Matthew Turnquist Name of the doctoral dissertation Integrated DC-DC Converters for Adaptive Ultra-Low-Energy Processors Publisher School of Electrical Engineering Unit Department of Microand Nanosciences Series Aalto University publication series DOCTORAL DISSERTATIONS 216/2016 Field of research Electronic circuit design Manuscript submitted 19 August 2015 Date of the defence 21 January 2016 Permission to publish granted (date) 19 November 2015 Language English Monograph Article dissertation (summary + original articles) Abstract There is an emerging class of energy-constrained adaptive processors that operate primarily at near-threshold (NT) voltages. Operating at NT significantly reduces energy consumption but avoids the large variance and performance penalties of sub-threshold. NT processors are useful for sensor-based platforms within ultra-portable electronics that require minimum energy consumption. Typically, the NT voltages are supplied by a DC-DC converter. Energy consumption of the DC-DC converter/processor system is proportional to the DC-DC's conversion efficiency. Thus, supplying the NT voltage with high efficiency is essential in realizing ultra-low-energy consumption. High efficiency over an increasingly large power range (due to large differences in sleep and active power levels) also require careful consideration. Besides the challenges in efficiency, the DC-DC converter should be fully integrated to meet the increasingly small form factor requirements of modern ultra-portable electronics. Research work presented in this thesis addresses the previous challenges by introducing new NT DC-DC converters, new techniques for reducing the increasingly dominant DC-DC control circuitry power losses, and new DC-DC/processor co-design methodologies. There are three main focus areas within the thesis: SC DC-DC converters, adaptive processors, and DC-DC converter/adaptive processor systems. The thesis gives the necessary background of DC-DC converters and adaptive processors. The research work is demonstrated with five integrated circuit (IC) implementations and ten publications. Three of the IC implementations are fully integrated SC DC-DC converters. A step-down Dickson topology in 28 nm CMOS is first presented. An improved Dickson converter and a selfoscillating converter are then presented. Both of these converters are built in 28 nm UTBB FDSOI, and both take advantage of the strong impact of back-gate biasing in order to improve efficiency. Practical design considerations of the converter's input voltage are shown with a prototype Li-ion battery. All three of the implemented DC-DC converters are measured with adaptive (processor) loads. The final two IC implementations are adaptive processors. Both of the processors are built in 65 nm CMOS. The processors use an adaptive scheme called timing-error detection (TED) to ensure reliability at NT voltages. One of the processors is the first-known TED processor